The Heath Labs - Nanoelectronics & Nanosensing



In general, an academic research group specializes in one or two specific topics, and works to expand our understanding of those topics and their possible applications. This "topic" could represent a specific instrument, a class of proteins, or even a type of chemical reaction. Our lab is centered around a clever method of fabricating large, ordered arrays of high-fidelity nanowires at the highest density ever demonstrated. The method was pioneered in our lab a few years ago and has catapulted the group into the spotlight at numerous levels, as our work places us at the cutting edge of both molecular electronics and early-stage cancer detection efforts. Day-to-day work in the Heath labs looks pretty glamorous: we have our own Class 100 cleanroom where we wander around in bunny suits as we fabricate our devices using an impressive array of advanced equipment. So what do our devices do? Read on to find out - but first, a word on the boss...


The Boss

Dr. Jim Heath first came to prominence as a graduate student when he discovered a new form of carbon called C60, also known as buckminsterfullerene or bucky-balls. Bucky balls and the closely-related structures known as carbon nanotubes have been a really hot research topic ever since, and they are finding use in everything from next-generation electronics to common house paint. The discovery was significant enough that it earned Jim's boss (Rick Smalley) the 1995 Nobel Prize. Since that time, Jim has worked at IBM and was recently a professor at UCLA until Caltech lured him away.


Writing on the Nano Frontier

Gordon Moore, the founder of Intel, famously predicted that the density of computer circuits would double once every 18 months. Now known as Moore's Law, his bold statement has held true for over two decades, but it's anybody's guess just how much longer it can continue to do so. To achieve the highest density possible, companies like IBM, Intel, & AMD have always defined the transistors and other electrical components on their silicon wafers using light to draw the features (known as optical lithography). Just like drawing with a pen, the smallest feature you can produce depends on the size of your tip. While conventional pen tips usually range from 0.3mm to 0.7mm in diameter, the "tip" of optical lithography systems is ~300 nanometers - over 1,000x smaller! But to keep up with Moore's law, we must now make features that are yet smaller!

The Supperlattice Nanowire Pattern Transfer (SNAP) technique is designed to generate features that are 10 times smaller than optical lithography can achieve today, and it represents the bread & butter of our group. Rather than using light to draw features, the SNAP process uses a physical imprintation method, akin to a rubber stamp. The stamp itself is generated using some clever chemistry, and is then "inked" and placed on the silicon. The choice of ink is flexible, and means we can make wires out of not just Silicon, but also Platinum, Gold, or several other metals. Using this technique, we have demonstrated wires as small as 10 nanometeres wide and spaced just 10 nanometers apart - a world record in terms of density!



An SEM image of the stamp used to produce SNAP wires


A flawless SNAP imprint consisting of ~120 Si nanowires


A zoomed-in view illustrates the regularity & fidelity of SNAP

Nanoelectronics

Our electronics subgroup is one of the only groups in the world that is working on truly useful, fully integrated nanoelectronic devices. While the literature is full of one-off demonstrations of individual device components, very few groups actually take the next step of fabricating a full device. For example, there are several reports demonstrating nanotubes that function as transistors or as memory storage elements, but none of a full logic circuit or memory circuit using such nanotubes. And there is a good reason for this: as the number of components constituting the device increases, it becomes exponentially harder to fabricate each component without damaging others in the process. Moreover, increased complexity requires that the device's individual components be more robust, as a failure in one dooms the entire device.

In spite of these challenges, our group has recently succeeded in generating a functional molecular memory circuit at the highest density ever demonstrated: a whopping 10 gigabytes per square cm (roughly 1/4 of your thumbnail)! The device consists of two arrays of SNAP wires criss-crossing one another at 90 degrees, with each intersection containing a group of special memory molecules sandwiched in between the wires. Each memory molecule consists of a ring-shaped structure with a long pole threaded through it; the molecule stores a value of 1 or 0 based on the position of the ring along the pole. While conceptually simple, the successful device was the result of a herculean effort and several years of development.



A memory device with "crossbar" architecture; each intersection is 1 bit


Each memory bit can have a value of 0 (low current), or 1 (high current)


A schematic of two adjacent bits, each with a different value